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Add Carrier and Vector for named groups of block channels - #253

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milanofthe wants to merge 3 commits into
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Adds Carrier and Vector, named ranges of scalar channels that can be used as port label values. Carriers only exist during graph assembly and resolve to integer indices, registers and the numerics stay flat float64.

  • Registers are sized from carrier labels, blk.outputs["name"] reads and writes all channels
  • PortReference expands carrier ports to their channels, single channels via blk["name"].key or blk["name"]["key"]
  • Channels resolve per direction, a port name can be a different carrier for inputs and outputs
  • Connection checks widths per direction, connection conflicts are checked on resolved channels
  • Linearization labels name carrier channels

Part of #250

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codecov Bot commented Sep 17, 2026

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Codecov Report

❌ Patch coverage is 98.05195% with 3 lines in your changes missing coverage. Please review.

Files with missing lines Patch % Lines
src/pathsim/optim/linearization.py 81.81% 2 Missing ⚠️
src/pathsim/utils/portreference.py 98.33% 1 Missing ⚠️

📢 Thoughts on this report? Let us know!

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