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Add Windows AI developer setup workloads - #98

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Michael Von Hippel (Kixantrix) wants to merge 13 commits into
microsoft:user/amelbawa/dev-config-2from
Kixantrix:mihippel-microsoft-windows-ai-setup-workloads
Closed

Michael Von Hippel (Kixantrix) wants to merge 13 commits into
microsoft:user/amelbawa/dev-config-2from
Kixantrix:mihippel-microsoft-windows-ai-setup-workloads

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@Kixantrix

@Kixantrix Michael Von Hippel (Kixantrix) commented Sep 4, 2026

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Summary

  • replace AI winget configure acquisition with PR Add a resumable PowerShell setup flow for Windows developer machines #93-style resumable PowerShell check → apply → verify flows
  • keep independent cuda, rocm, intel-ai, foundry, pytorch, llama.cpp, and ollama entry points
  • make PyTorch self-contained for CPU, NVIDIA CUDA, AMD ROCm, and Intel XPU, with deterministic mixed-GPU selection and vendor-appropriate Triton
  • resolve official backend-specific llama.cpp releases for NVIDIA CUDA, AMD ROCm, Intel SYCL/OpenVINO, Qualcomm Adreno OpenCL, Vulkan, and CPU instead of representing all x64 systems with the WinGet Vulkan package
  • require llama.cpp's official backends JSON field plus actual offloaded X/Y layers diagnostics; requested -ngl is not accepted as hardware proof
  • add non-mutating plans, structured JSON reports, centralized provider/promotion metadata, and portable partner validation commands

Dependency

Depends on #93 and intentionally targets user/amelbawa/dev-config-2, not main.

Acquisition and vendor layers

AI workloads no longer contain configuration.winget files. Their PowerShell entry points reuse the Windows Dev Config WinGet, retry, PATH, elevation, and bounded-process contracts through src/Workloads/_common/direct-setup.ps1.

CPU architecture and GPU vendor are independent axes. ARM64 is not a GPU vendor: the validated N1X host is Windows ARM64 with NVIDIA RTX Spark. AMD ROCm and Intel XPU/oneAPI currently publish native Windows x64 artifacts only.

Vendor / architecture Native developer/runtime acquisition PyTorch contained runtime acquisition llama.cpp runtime acquisition
NVIDIA x64 cuda uses exact WinGet ID Nvidia.CUDA: the shared PowerShell helper skips a current package, runs exact winget upgrade when outdated, or exact winget install when absent. Visual Studio Build Tools and native MSVC are ensured separately through WinGet. Installs the exact official PyTorch cu126 or cu130 wheel selected from driver/device capability into a contained venv. The wheel carries its tensor runtime; standalone CUDA/MSVC is acquired only when compatible Triton JIT needs compilation. Downloads one complete official ggml-org rolling-release pair: CUDA 13.3 app+cudart for driver 580+, otherwise CUDA 12.4 app+cudart for supported drivers/devices. Both GitHub asset digests are verified and the runtime is installed atomically under %LOCALAPPDATA%\DevConfig\llama.cpp\runtime.
NVIDIA ARM64 / RTX Spark cuda downloads NVIDIA cuda_13.4.0_windows_arm64.exe directly (not through WinGet), caches it at %ProgramData%\WindowsDeveloperConfig\cache\nvidia-cuda\13.4.0, verifies pinned SHA-256 a1f68c81160b16d519c4087788b9c07de41306c3f1b872471ceee0996621374d and the NVIDIA Authenticode signer, then silently installs CUDA v13.4. Visual Studio Build Tools/MSVC still use the exact WinGet package flow. Downloads the exact pinned NVIDIA/PyTorch cu134 ARM64 wheel into %LOCALAPPDATA%\DevConfig\pytorch\wheel-cache, verifies its SHA-256, and installs it into the contained venv. CUDA/MSVC is ensured when Triton JIT is enabled. Downloads matching official CUDA 13.4 ARM64 app+cudart assets from one ggml-org release, verifies both GitHub digests, and atomically installs the resolver-owned runtime.
AMD x64 rocm installs the exact rocm[libraries,devel,device-<gfx>]==10.0.0 tuple from AMD's stable Windows feed into %LOCALAPPDATA%\DevConfig\rocm\.venv; the detected supported GPU name selects <gfx>. Wheel RECORD metadata is retained, then hipcc compiles and executes a HIP kernel. Installs the exact AMD torch[device-<gfx>], matching torchvision, and torchaudio ROCm 10 tuple from the AMD feed into %LOCALAPPDATA%\DevConfig\pytorch\.venv. The native rocm SDK flow is not a prerequisite for tensor inference. Downloads the official llama-bNNNNN-bin-win-rocm-10.0-x64.zip from the newest complete ggml-org release, verifies its GitHub SHA-256 digest, and atomically installs the resolver-owned runtime.
Intel x64 intel-ai -Profile OpenVINO installs the pinned OpenVINO 2026.3.1 Python tuple into %LOCALAPPDATA%\DevConfig\intel-ai\openvino\.venv. -Profile SYCL or Full additionally ensures exact WinGet ID Intel.OneAPI.Toolkit for native SYCL development. Installs exact torch==2.14.0+xpu, torchvision==0.29.0+xpu, and triton-xpu==3.8.0 from the official PyTorch XPU index into %LOCALAPPDATA%\DevConfig\pytorch\.venv; full oneAPI is not required. Downloads the official rolling SYCL x64 asset by default for a supported Intel GPU, or the OpenVINO 2026.3.1 x64 asset when explicitly requested; verifies the GitHub digest and atomically installs the runtime.
Qualcomm / Adreno ARM64 Foundry Local is acquired as architecture-native WinGet package Microsoft.FoundryLocal; its WinML provider layer controls acceleration and the report records the actual EP or CPU fallback. No native Windows Qualcomm/Adreno PyTorch accelerator package is published; CPU PyTorch remains available. Downloads the official llama-bNNNNN-bin-win-opencl-adreno-arm64.zip only when an Adreno adapter and OpenCL loader are detected, verifies its GitHub digest, and atomically installs the runtime.

Every flow inventories the host, resolves a supported provider, supports -PlanOnly, checks current state, installs/upgrades only the selected stack, executes a real workload, and writes a report conforming to src/docs/ai-workload-report.schema.json.

GPU drivers are validated prerequisites and are not installed or replaced by these flows.

Quick installation mechanics

Component Acquisition and destination Readiness proof
CUDA x64 uses exact WinGet ID Nvidia.CUDA; ARM64 uses the pinned and Authenticode-verified NVIDIA 13.4 preview EXE described above. Both ensure architecture-native MSVC. nvcc compiles and executes smoke.cu on the selected NVIDIA GPU.
ROCm / HIP AMD stable Windows Python feed, exact GPU-specific ROCm 10 SDK tuple, contained at %LOCALAPPDATA%\DevConfig\rocm\.venv. hipcc compiles and executes a HIP kernel; report includes AMD device and gfx target.
Intel AI OpenVINO 2026.3.1 Python packages install into %LOCALAPPDATA%\DevConfig\intel-ai\openvino\.venv; optional native SYCL uses WinGet Intel.OneAPI.Toolkit. OpenVINO inference runs on the requested CPU/GPU/NPU; optional SYCL profile compiles and runs a GPU kernel.
Foundry Local Exact WinGet ID Microsoft.FoundryLocal; skip/upgrade/install behavior uses the shared package helper. The application is installed as an architecture-native per-user MSIX; models use the Foundry-managed cache. Downloads/caches qwen3-0.6b, runs real inference, and reports the actual execution provider, including truthful CPU fallback.
PyTorch WinGet Python.Python.3.13, then a contained venv under %LOCALAPPDATA%\DevConfig\pytorch\.venv. CPU/CUDA use official PyTorch indexes except the pinned ARM64 CUDA wheel; AMD uses the stable ROCm feed; Intel uses the official XPU index. Tensor and NumPy bridge execute on the selected device; CUDA/XPU Triton paths run compiled workloads.
Triton CUDA uses exact community package triton-windows==3.8.0.post28; Intel uses official XPU package triton-xpu==3.8.0. Both install inside the PyTorch venv. Native Windows AMD Triton is unavailable. CUDA vector-add or Intel cold torch.compile executes on the selected GPU.
llama.cpp Downloads the newest complete official ggml-org release asset set for the resolved backend (CUDA pair, ROCm, SYCL, OpenVINO, Adreno OpenCL, Vulkan, or CPU), verifies every GitHub digest, caches by release tag, and atomically installs under %LOCALAPPDATA%\DevConfig\llama.cpp\runtime. Pinned GGUF inference plus llama-bench proves backend, physical device, and offloaded GPU layers.
Ollama x64 uses exact WinGet ID Ollama.Ollama; ARM64 downloads the latest official ollama-windows-arm64.zip, verifies the GitHub digest, and atomically installs under %LOCALAPPDATA%\DevConfig\ollama\runtime. Models remain in the Ollama-managed model store. Pulls a verified model, runs inference, and reports actual CPU/GPU allocation and VRAM usage.

Hardware matrix

Workload/backend Windows x64 Windows ARM64 Readiness requirement
CUDA Exact WinGet ID Nvidia.CUDA: skip when current, exact winget upgrade when outdated, exact winget install when absent; ensure Visual Studio Build Tools/native MSVC separately Direct NVIDIA cuda_13.4.0_windows_arm64.exe (not WinGet); cache under %ProgramData%\WindowsDeveloperConfig\cache\nvidia-cuda\13.4.0; verify pinned SHA-256 + NVIDIA Authenticode; silently install CUDA v13.4; ensure ARM64 MSVC through WinGet Resolve nvcc, compile smoke.cu, and execute it on the selected NVIDIA GPU
ROCm/HIP native AMD ROCm Core SDK 10.0 on the published GPU/gfx matrix Unsupported/unpublished Compile and execute a HIP kernel on the detected AMD GPU
Intel AI OpenVINO CPU/GPU/NPU; optional oneAPI/SYCL Unsupported/unpublished Generated-model inference on the requested OpenVINO device; optional compiled SYCL GPU kernel
Foundry Local WinML/Windows ML WinML/Windows ML Qwen3-0.6B inference with the actual provider reported; CPU fallback is explicit
PyTorch CPU Official stable CPU index Official stable CPU index Tensor operation on CPU
PyTorch CUDA Official stable CUDA wheel selected by driver/capability Pinned NVIDIA cu134 ARM64 nightly on qualified RTX Spark Tensor on the actual NVIDIA device; compatible Triton executes vector-add
PyTorch ROCm AMD stable Windows feed, exact device-<gfx> tuple Unsupported/unpublished Non-null torch.version.hip, AMD device name/gfx target, and tensor on the AMD GPU
PyTorch XPU Official PyTorch XPU index Unsupported/unpublished torch.xpu.is_available(), Intel device tensor, and cold torch.compile through triton-xpu
Triton Windows CUDA Community triton-windows on qualified CUDA stacks Qualified CUDA 13.4 preview stack JIT-compiled vector-add on NVIDIA GPU
Triton XPU Official triton-xpu integration Unsupported/unpublished Cold torch.compile execution on Intel XPU
llama.cpp CUDA Official CUDA 13.3/12.4 app+cudart pair Qualified CUDA 13.4 app+cudart pair llama-bench identifies CUDA/NVIDIA device and GPU layers; pinned GGUF inference passes
llama.cpp ROCm Official ROCm 10.0 asset Unsupported Benchmark identifies ROCm/AMD device and GPU layers; inference passes
llama.cpp SYCL/OpenVINO Official SYCL; explicit OpenVINO 2026.3.1 Unsupported Benchmark identifies selected backend/device and GPU layers; inference passes
llama.cpp Adreno OpenCL Unsupported Official Qualcomm Adreno OpenCL asset Benchmark identifies OpenCL/Adreno and GPU layers; inference passes
llama.cpp Vulkan/CPU Vulkan is Auto fallback after vendor-native choices; CPU always available CPU fallback Vulkan is reported explicitly with GPU layers; CPU reports zero GPU layers
Ollama Stable WinGet desktop package Verified official ARM64 ZIP Verified model blob, structured inference, and /api/ps backend/VRAM evidence

PyTorch -Backend Auto priority is supported NVIDIA CUDA → supported AMD ROCm → supported Intel XPU → CPU. llama.cpp -Backend Auto priority is supported NVIDIA CUDA → supported AMD ROCm → supported Intel SYCL → Qualcomm Adreno OpenCL → x64 Vulkan → CPU. Explicit selections target secondary adapters and fail actionably when incompatible.

Known vendor gaps and boundaries

Vendor GPU coverage NPU coverage CPU architecture Maturity / live-validation status Known gaps
NVIDIA CUDA toolkit, PyTorch CUDA/Triton, llama.cpp CUDA No vendor-specific NPU flow; Foundry/WinML is separate x64 designed/partner pending; ARM64 N1X validated x64 stable channels need a partner run; ARM64 CUDA/PyTorch are developer previews Foundry on N1X is truthfully CPUExecutionProvider because CUDA EP registration was unavailable. Drivers are qualified but not replaced.
AMD ROCm/HIP, PyTorch ROCm, llama.cpp ROCm on AMD's published GPU/gfx matrix Not implemented; ROCm is GPU/HIP, not the Ryzen AI NPU stack x64 only Resolver/static acceptance complete; hardware pending Native Windows AMD Triton is unavailable. Ollama AMD and Foundry/WinML AMD EP acceleration are not claimed without backend evidence.
Intel OpenVINO GPU, oneAPI/SYCL, PyTorch XPU/triton-xpu, llama.cpp SYCL/OpenVINO OpenVINO NPU only after actual selected-device execution x64 only Resolver/static acceptance complete; hardware pending PyTorch XPU and llama SYCL target Intel GPUs, not NPUs. Full oneAPI is only the native SYCL developer path.
Qualcomm/Adreno llama.cpp OpenCL ARM64; Foundry/WinML vendor-neutral path Only through a validated provider such as WinML/Foundry ARM64 Resolver/static acceptance complete; hardware pending No native PyTorch accelerator backend. Ollama ARM64 remains CPU/NVIDIA capability unless actual Adreno evidence is available.
Other/fallback Vulkan x64 compatibility fallback; CPU x64/ARM64 None As listed Compatibility only Vulkan/CPU are never reported as vendor-native. Mali and other stacks are unimplemented/unpublished without official Windows artifacts.

Auto priority is deterministic and an explicit backend can select a supported secondary vendor. Same-vendor targeting is exposed through CUDA/ROCm and explicit-backend PyTorch -DeviceIndex, llama.cpp -Device, OpenVINO -OpenVinoDeviceId, and oneAPI -SyclDeviceSelector. PyTorch Auto intentionally requires index 0. Foundry and Ollama are source-managed and report actual device/allocation rather than claiming a selector. GPU drivers are reportable preconditions; flows fail with remediation but do not replace them.

Code path readiness before hardware testing

Supported combination Resolver Acquisition Probe Report Static/unit Live hardware
CUDA NVIDIA x64 Yes WinGet Nvidia.CUDA + native MSVC Native kernel Yes Pass Partner pending
CUDA NVIDIA ARM64 N1X Yes Pinned NVIDIA CUDA 13.4 EXE + native MSVC Native kernel Yes Pass Passed
ROCm/HIP AMD x64 Yes Yes Native HIP kernel Yes Pass Partner pending
Intel OpenVINO CPU x64 Yes Yes CPU inference Yes Pass Partner pending
Intel OpenVINO GPU x64 Yes Yes GPU inference Yes Pass Partner pending
Intel OpenVINO NPU x64 Yes Yes NPU inference Yes Pass Partner pending
Intel oneAPI/SYCL GPU x64 Yes Yes SYCL kernel Yes Pass Partner pending
Intel Full GPU x64 Yes OpenVINO + oneAPI GPU inference + SYCL kernel Yes Pass Partner pending
PyTorch CPU x64 Yes Yes Tensor + NumPy Yes Pass Partner pending
PyTorch CPU ARM64 Yes Yes Tensor + NumPy Yes Pass Partner pending
PyTorch CUDA x64 Yes Yes NVIDIA tensor Yes Pass Partner pending
PyTorch CUDA ARM64 N1X Yes Yes NVIDIA tensor Yes Pass Passed
PyTorch ROCm AMD x64 Yes Yes HIP-runtime AMD tensor Yes Pass Partner pending
PyTorch XPU Intel x64 Yes Yes XPU tensor Yes Pass Partner pending
Triton CUDA x64 Yes Yes Vector-add Yes Pass Partner pending
Triton CUDA ARM64 N1X Yes Yes Vector-add Yes Pass Passed
Triton XPU Intel x64 Yes Yes Cold torch.compile Yes Pass Partner pending
llama CPU x64 Yes Yes Benchmark + inference Yes Pass Partner pending
llama CPU ARM64 Yes Yes Benchmark + inference Yes Pass Partner pending
llama CUDA x64 Yes Complete paired assets Benchmark + inference Yes Pass Partner pending
llama CUDA ARM64 N1X Yes Complete paired assets Benchmark + inference Yes Pass Passed
llama ROCm AMD x64 Yes Yes Benchmark + inference Yes Pass Partner pending
llama SYCL Intel x64 Yes Yes Benchmark + inference Yes Pass Partner pending
llama OpenVINO x64 Yes Yes Benchmark + inference Yes Pass Partner pending
llama Vulkan x64 fallback Yes Yes Benchmark + inference Explicit fallback Pass Partner pending
llama Adreno OpenCL ARM64 Yes Yes Benchmark + inference Yes Pass Partner pending
Foundry x64 Yes Yes Real model inference Source-managed actual EP Pass Partner pending
Foundry ARM64 Yes Yes Real model inference Source-managed actual EP Pass Passed on N1X CPU EP
Ollama x64 Yes Yes Verified model + inference Source-managed allocation Pass Partner pending
Ollama ARM64 Yes Yes Verified model + inference Source-managed allocation Pass Passed on N1X NVIDIA GPU

ai-catalog.psd1::CapabilityMatrix is executable: the shared test invokes every implemented/source-managed resolver fixture and checks acquisition metadata, probe existence, report contract, and partner command. Upstream-unavailable cells are the only non-implemented cells and return cataloged actionable blockers.

Current → stable acquisition and promotion report

Metadata is centralized in src/Workloads/_common/ai-catalog.psd1; moving a qualified preview/rolling provider to a normal channel is a resolver/data change.

Component Vendor / CPU arch Maturity Current authoritative source and exact identity Resolver selection rule Version policy Integrity/authenticity Local cache Installed/runtime path Why normal channel is insufficient Expected stable source Migration trigger / evidence Cleanup / upgrade
CUDA x64 NVIDIA / x64 Stable WinGet Nvidia.CUDA Current CUDA 13 package; GPU readiness requires driver 580+/CC7.5+ Current stable WinGet hash + vendor signature WinGet managed %ProgramFiles%\NVIDIA GPU Computing Toolkit\CUDA\v* N/A Nvidia.CUDA New package compiles/runs kernel WinGet upgrade/vendor uninstall
CUDA ARM64 NVIDIA / ARM64 Developer preview cuda_13.4.0_windows_arm64.exe, SHA-256 a1f68c...1374d RTX Spark, driver 616+, Windows 11 ARM64 Exact 13.4.0 Pinned SHA-256 + NVIDIA Authenticode %ProgramData%\WindowsDeveloperConfig\cache\nvidia-cuda\13.4.0 CUDA v13.4 WinGet has no ARM64 payload Nvidia.CUDA ARM64 — unconfirmed ARM64 manifest + N1X kernel Qualify side-by-side, remove old preview
PyTorch CUDA x64 NVIDIA / x64 Stable Official cu126/cu130 indexes, torch==2.14.0+cu* Driver/capability-qualified exact wheel Exact stable tuple Official index hashes + wheel RECORD Python cache PyTorch venv N/A Official PyTorch CUDA indexes Tensor + Triton kernel Replace venv
PyTorch CUDA ARM64 NVIDIA / ARM64 Nightly preview torch-2.15.0.dev20260904+cu134-cp313-cp313-win_arm64.whl, SHA-256 af0872...65d3 CPython 3.13, driver 616+, CC12.x Exact qualified nightly Pinned SHA-256 %LOCALAPPDATA%\DevConfig\pytorch\wheel-cache PyTorch venv Stable indexes lack win_arm64 CUDA Official Windows ARM64 CUDA feed — unconfirmed Stable wheel + N1X tensor/Triton Replace venv; prune cache
PyTorch ROCm AMD / x64 Stable AMD feed: torch[device-<gfx>]==2.13.0+rocm10.0.0, torchvision[device-<gfx>]==0.28.0+rocm10.0.0, torchaudio==2.11.0.2+rocm10.0.0 Exact supported GPU → gfx package Exact production tuple AMD HTTPS feed + wheel RECORD Python cache PyTorch venv Default PyPI lacks AMD Windows build AMD stable ROCm feed HIP non-null + AMD tensor Replace venv
PyTorch XPU Intel / x64 Stable XPU index: torch==2.14.0+xpu, torchvision==0.29.0+xpu Validated Intel GPU family Exact XPU tuple Official index hashes + RECORD Python cache PyTorch venv Default PyPI lacks XPU build Official PyTorch XPU index Intel tensor + cold compile Replace venv
Triton Windows CUDA NVIDIA / x64, ARM64 Community PyPI triton-windows==3.8.0.post28 Compatible CUDA PyTorch tuple Exact TLS + wheel RECORD Python cache PyTorch venv Upstream has no general stable Windows package Official Windows Triton feed — unconfirmed Official package + vector-add Replace venv
Triton XPU Intel / x64 Stable integrated XPU index triton-xpu==3.8.0 Compatible PyTorch XPU tuple Exact Official index hashes + RECORD Python cache PyTorch venv Standalone project documents Linux; Windows is PyTorch integration Official XPU index Cold compile on Intel GPU Replace venv
llama CUDA x64 NVIDIA / x64 Rolling One bNNNNN release: llama-bNNNNN-bin-win-cuda-13.3-x64.zip + matching cudart, or CUDA 12.4 pair Driver ≥580 and CC≥7.5 selects 13.3; driver ≥551.61 and CC5.x–9.x selects 12.4 Newest complete pair GitHub SHA-256 per asset %LOCALAPPDATA%\DevConfig\llama.cpp\asset-cache\<tag> Resolver runtime WinGet maps only to Vulkan Backend-specific ggml.llamacpp CUDA — unconfirmed Package variant + NVIDIA benchmark/inference Reuse cache; atomic swap
llama CUDA ARM64 NVIDIA / ARM64 Rolling developer preview One release: CUDA 13.4 app + matching cudart RTX Spark, driver 616+, CC12.x Newest complete pair GitHub SHA-256 per asset Same asset cache Resolver runtime No WinGet ARM64 CUDA variant Backend-specific package — unconfirmed Package variant + N1X acceptance Reuse cache; atomic swap
llama ROCm x64 AMD / x64 Rolling llama-bNNNNN-bin-win-rocm-10.0-x64.zip Supported AMD gfx matrix Newest matching release GitHub SHA-256 Same asset cache Resolver runtime WinGet maps only to Vulkan Backend-specific package — unconfirmed AMD benchmark/inference Reuse cache; atomic swap
llama SYCL/OpenVINO x64 Intel/general / x64 Rolling ...-win-sycl-x64.zip or ...-win-openvino-2026.3.1-x64.zip Intel Auto prefers SYCL; OpenVINO explicit Newest matching release GitHub SHA-256 Same asset cache Resolver runtime WinGet maps only to Vulkan Backend-specific packages — unconfirmed Selected backend/device benchmark/inference Reuse cache; atomic swap
llama Adreno OpenCL ARM64 Qualcomm / ARM64 Rolling ...-win-opencl-adreno-arm64.zip Adreno adapter + OpenCL loader Newest matching release GitHub SHA-256 Same asset cache Resolver runtime No ARM64 Adreno WinGet variant Backend-specific package — unconfirmed OpenCL/Adreno benchmark/inference Reuse cache; atomic swap
llama Vulkan x64 Cross-vendor / x64 Rolling fallback ...-win-vulkan-x64.zip Only after vendor-native Auto choices, with Vulkan loader/device Newest matching release GitHub SHA-256 Same asset cache Resolver runtime Current WinGet ID cannot express backend alternatives Reliable backend-specific WinGet variant Vulkan benchmark/inference Reuse cache; atomic swap
llama CPU CPU / x64, ARM64 Rolling fallback ...-win-cpu-x64.zip or ...-win-cpu-arm64.zip Explicit CPU or no qualified accelerator Newest matching release GitHub SHA-256 Same asset cache Resolver runtime WinGet lacks selectable CPU/ARM64 variants Backend-specific packages — unconfirmed CPU benchmark/inference Reuse cache; atomic swap
Foundry Local Cross-vendor / x64, ARM64 Preview WinGet Microsoft.FoundryLocal Applicable architecture-native WinML package Current preview MSIX hash/signature Foundry cache Per-user MSIX Product remains preview Same ID at GA Microsoft GA + provider/inference WinGet upgrade/cache cleanup
Ollama ARM64 CPU/NVIDIA / ARM64 Stable direct Official ollama-windows-arm64.zip Latest non-prerelease release Current stable GitHub SHA-256 Resolver cache %LOCALAPPDATA%\DevConfig\ollama\runtime Desktop WinGet is x64 Current ARM64 WinGet ID — unconfirmed Package catches release + API/GPU evidence Atomic swap
ROCm native SDK AMD / x64 Stable AMD rocm[libraries,devel,device-<gfx>]==10.0.0 Exact supported GPU/gfx Exact production tuple AMD HTTPS + RECORD Python cache ROCm venv No confirmed WinGet ID AMD stable feed; WinGet unconfirmed New matrix + HIP kernel Replace venv
Intel OpenVINO / oneAPI Intel / x64 Stable PyPI OpenVINO 2026.3.1; WinGet Intel.OneAPI.Toolkit Requested OpenVINO device/profile Exact matched tuple/qualified package RECORD; WinGet hash/signature Python/WinGet cache Intel AI venv/oneAPI root N/A Same official channels Device inference/SYCL kernel Replace venv/WinGet upgrade

Real-hardware acceptance

Validated on Windows 11 ARM64 build 28120, NVIDIA RTX Spark N1X, driver 616.62, CUDA UMD 13.4, compute capability 12.1:

Flow Acquisition/preconditions Actual workload and hardware evidence Result
CUDA Build Tools 17.14.40 current; Hostarm64\arm64\cl.exe; CUDA 13.4 preview current; nvcc V13.4.46 Compiled/executed smoke.cu on N1X Ready
PyTorch/Triton Python current; pinned 1.85 GB ARM64 torch wheel; NumPy 2.5.2; triton-windows 3.8.0.post28 CUDA tensor on N1X runtime 13.4; JIT-compiled driver/vector-add kernel Ready
Foundry Local WinGet 0.10.3 current; qwen3-0.6b (~593 MB) cached Real inference; truthful CPUExecutionProvider; failed optional WebGPU/NvTensorRT registrations retained Ready with CPU fallback
llama.cpp Official b10883 CUDA 13.4 app+cudart; pinned Qwen3-0.6B Q4_K_M GGUF, 396,704,416 bytes ggml-cuda.dll; N1X CC12.1; CUDA; 999 GPU layers; prompt 2836.65 t/s; generation 127.34 t/s; real inference Ready
Ollama Stable-direct 0.34.0; verified qwen3:0.6b digest; resolver-owned http://127.0.0.1:65364 Real inference; /api/ps reports 100% GPU Ready

CUDA and PyTorch ARM64 remain developer previews; this qualifies the tested N1X configuration and is not a production-support claim. The current llama resolver preserves the same official b10883 CUDA 13.4 pair and acceptance logic, adds explicit -ngl 999, cache/digest metadata, and atomic installation; no expensive N1X model rerun was performed for this resolver-only update.

Lightweight acceptance was rerun after adding explicit adapter selection: the
indexed CUDA kernel executed on device 0
NVIDIA RTX Spark N1X (5120-core Blackwell RTX GPU), the indexed PyTorch CUDA
tensor reported torch 2.15.0.dev20260904+cu134 / CUDA 13.4 / NumPy 2.5.2,
and indexed Triton vector-add JIT executed on the same device. The reusable
llama probe reran inference plus verbose benchmark validation, read the official
backends=CUDA and gpu_info fields, and parsed offloaded 29/29 layers to GPU. The final elevated ARM64 Ollama acceptance launched runtime 0.34.0 on
resolver-owned http://127.0.0.1:65364, verified the qwen3:0.6b digest,
completed real inference, and reported 100% GPU through /api/ps. A live
Foundry report probe selected CPUExecutionProvider, marked truthful CPU
fallback, and retained WebGPU/NvTensorRT/CUDA providers only as observed
registration attempts. The final Ollama report and console log were retained
as n1x-final-ollama.json and n1x-final-ollama.log.

Partner commands and remaining hardware gaps

Checkout the qualified PR head:

gh pr checkout 98 --repo microsoft/WindowsDeveloperConfig
$ExpectedHead = gh pr view 98 --repo microsoft/WindowsDeveloperConfig `
  --json headRefOid --jq .headRefOid
if ((git rev-parse HEAD).Trim() -ne $ExpectedHead) {
  throw "PR #98 checkout does not match published head $ExpectedHead."
}

The workload implementation was qualified at ec7fc5e; later commits may be
documentation-only. Always use the live PR head selected above.

Git-only fallback:

git fetch https://github.com/Kixantrix/WindowsDeveloperConfig.git `
  mihippel-microsoft-windows-ai-setup-workloads:pr-98
git switch pr-98

Open elevated PowerShell in the repository root:

$ErrorActionPreference = 'Stop'
$ReportRoot = Join-Path $env:TEMP "devconfig-ai-$env:COMPUTERNAME"
New-Item -ItemType Directory -Path $ReportRoot -Force | Out-Null

.\src\tools\collect-ai-hardware.ps1 `
  -OutputPath "$ReportRoot\hardware.json" *>&1 |
  Tee-Object "$ReportRoot\hardware.console.log"

function Invoke-PartnerFlow {
  param(
    [Parameter(Mandatory)] [string] $Name,
    [Parameter(Mandatory)] [string] $Script,
    [string[]] $Arguments = @()
  )
  $planPath = Join-Path $ReportRoot "$Name-plan.json"
  $finalPath = Join-Path $ReportRoot "$Name-final.json"
  & $Script @Arguments -PlanOnly -ReportPath $planPath *>&1 |
    Tee-Object (Join-Path $ReportRoot "$Name-plan.console.log")
  $plan = Get-Content $planPath -Raw | ConvertFrom-Json
  if ($plan.result.blockers.Count) {
    throw "$Name blocked: $($plan.result.blockers -join '; ')"
  }
  & $Script @Arguments -ReportPath $finalPath *>&1 |
    Tee-Object (Join-Path $ReportRoot "$Name-final.console.log")
  $final = Get-Content $finalPath -Raw | ConvertFrom-Json
  if (-not $final.result.ready) {
    throw "$Name did not produce result.ready=true."
  }
}

# NVIDIA Windows x64
Invoke-PartnerFlow nvidia-cuda .\src\Workloads\cuda\install.ps1
Invoke-PartnerFlow nvidia-pytorch .\src\Workloads\pytorch\install.ps1 `
  @('-Backend', 'CUDA', '-RequireTriton')
Invoke-PartnerFlow nvidia-llama .\src\Workloads\llama.cpp\install.ps1 `
  @('-Backend', 'CUDA')

# AMD Windows x64
Invoke-PartnerFlow amd-pytorch .\src\Workloads\pytorch\install.ps1 `
  @('-Backend', 'ROCm')
Invoke-PartnerFlow amd-hip .\src\Workloads\rocm\install.ps1
Invoke-PartnerFlow amd-llama .\src\Workloads\llama.cpp\install.ps1 `
  @('-Backend', 'ROCm')

# Intel Windows x64 GPU
Invoke-PartnerFlow intel-pytorch-xpu .\src\Workloads\pytorch\install.ps1 `
  @('-Backend', 'XPU', '-RequireTriton')
Invoke-PartnerFlow intel-openvino-gpu .\src\Workloads\intel-ai\install.ps1 `
  @('-Device', 'GPU', '-Profile', 'OpenVINO')
Invoke-PartnerFlow intel-full-gpu .\src\Workloads\intel-ai\install.ps1 `
  @('-Device', 'GPU', '-Profile', 'Full')
Invoke-PartnerFlow intel-llama-sycl .\src\Workloads\llama.cpp\install.ps1 `
  @('-Backend', 'SYCL')
Invoke-PartnerFlow intel-llama-openvino .\src\Workloads\llama.cpp\install.ps1 `
  @('-Backend', 'OpenVINO')

# Intel Windows x64 NPU (not XPU/SYCL)
Invoke-PartnerFlow intel-openvino-npu .\src\Workloads\intel-ai\install.ps1 `
  @('-Device', 'NPU', '-Profile', 'OpenVINO')

# Qualcomm/Adreno Windows ARM64
Invoke-PartnerFlow qualcomm-llama .\src\Workloads\llama.cpp\install.ps1 `
  @('-Backend', 'OpenCL')
Invoke-PartnerFlow qualcomm-foundry .\src\Workloads\foundry\install.ps1

Foundry is source-managed: Qualcomm validation records the actual EP/fallback
and does not require accelerator selection. Return the entire $ReportRoot
directory plus reboot requested/performed status.

Success is not INSTALL_OK. Each final report must have
result.ready=true, no blockers, and acceptance evidence for the intended
device/backend.

Evidence Required fields or proof
Host Architecture, GPU/NPU model/vendor, driver
Acquisition Action, version/requirement, source/package/artifact, integrity, cache/install path
Selection Requested and selected backend/device/profile and adapter selector
CUDA/HIP Runtime/compiler, physical device, compute capability/gfx, kernel marker
PyTorch/Triton Exact tuple, CUDA/HIP/XPU runtime, physical device, tensor marker, vector-add or torch.compile
Intel AI Requested/actual OpenVINO CPU/GPU/NPU provider; actual SYCL GPU/kernel
llama.cpp Release assets/digests, backends, gpu_info, actual offloaded layers, model hash/marker
Foundry Actual selected device/EP, marker, fallbackUsed; CPU is valid when truthful
Ollama Model digest/marker, process/backend evidence, VRAM and gpuFraction when accelerated
Outcome result.ready, all warnings/blockers, plan/final console logs, reboot status

Remaining live gaps are AMD x64 PyTorch ROCm + native HIP + llama ROCm, Intel x64 PyTorch XPU/compile + OpenVINO/SYCL + llama SYCL/OpenVINO, NVIDIA x64 llama CUDA 13.3/12.4, and Qualcomm ARM64 llama OpenCL/Adreno.

Validation

  • 1,314 hardware-independent assertions pass across shared/CUDA/ROCm/Intel/Foundry/PyTorch/llama/Ollama suites
  • the executable capability matrix covers 30 implemented/source-managed cells and 9 explicit upstream-unavailable boundaries
  • all source PowerShell parses; all Python smoke scripts compile
  • all seven -PlanOnly flows complete and reports validate against the checked-in JSON schema
  • all ten llama b10883 Windows backend asset patterns match exactly one official asset with a GitHub SHA-256 digest
  • PyTorch tests cover exact ROCm/XPU tuples, self-contained toolkit separation, mixed-adapter priority/fallback, ARM64 rejection, smoke record parsing, and disabled Triton semantics
  • llama tests cover every backend/architecture, CUDA runtime choice and paired-asset completeness, mixed-GPU priority/explicit selection, unsupported requests, digest cache/idempotence, and backend/device/GPU-layer evidence
  • git diff --check passes

Hardware-dependent flows remain manual_test in hosted CI.

@Kixantrix
Michael Von Hippel (Kixantrix) force-pushed the mihippel-microsoft-windows-ai-setup-workloads branch from 5cc360d to cdfa20f Compare September 4, 2026 22:13
Michael Von Hippel and others added 2 commits September 8, 2026 16:02
Add independent CUDA, Foundry Local, PyTorch, llama.cpp, and Ollama flows with architecture-aware installation, model-free smoke tests, shared decision helpers, unit coverage, and documentation.

Co-authored-by: Copilot App <[email protected]>
Support CUDA and GPU-backed PyTorch on RTX Spark ARM64, resolve current llama.cpp ARM64 assets, and make every AI flow run an end-to-end kernel or model inference by default.

Co-authored-by: Copilot App <[email protected]>
@Kixantrix
Michael Von Hippel (Kixantrix) force-pushed the mihippel-microsoft-windows-ai-setup-workloads branch from cdfa20f to c008a17 Compare September 8, 2026 23:03
Michael Von Hippel and others added 10 commits September 8, 2026 16:28
Retry locked installer cleanup without masking results, harden ARM64 MSVC discovery, and update llama.cpp b10867 inference arguments and diagnostics.

Co-authored-by: Copilot App <[email protected]>
Use the verified Build Tools bootstrapper in modify mode, wait for installer completion, and require the architecture-native compiler before CUDA or Triton setup continues.

Co-authored-by: Copilot App <[email protected]>
Put the Visual Studio Installer directory on the child command PATH so VsDevCmd can resolve its bundled vswhere.exe under hardened executable lookup policies.

Co-authored-by: Copilot App <[email protected]>
Validate exact installed package versions before pip work, cache the pinned ARM64 wheel after one verified download, and keep tensor and Triton readiness probes on every run.

Co-authored-by: Copilot App <[email protected]>
Replace AI DSC acquisition with PR microsoft#93-style PowerShell setup, add AMD ROCm and Intel AI flows, centralize provider promotion metadata, and emit portable hardware acceptance reports.

Co-authored-by: Copilot App <[email protected]>
Distinguish absent, outdated, and current packages; use exact upgrade operations with module-to-CLI fallback; and make package evidence schema-tolerant.

Co-authored-by: Copilot App <[email protected]>
Use explicit native command results instead of inherited LASTEXITCODE and make Ollama managed-process cleanup tolerant of empty and already-exited processes.

Co-authored-by: Copilot App <[email protected]>
Parse llama benchmark JSON after diagnostic prefixes, retain raw backend diagnostics, normalize Foundry cache paths, and force UTF-8 standalone capture.

Co-authored-by: Copilot App <[email protected]>
Add exhaustive supported-cell resolution, vendor-native llama.cpp backends, self-contained PyTorch ROCm/XPU paths, deterministic adapter selection, and strict hardware evidence reporting.

Co-authored-by: Copilot App <[email protected]>
Add a self-contained plan/apply/report workflow, complete vendor assignments, evidence return criteria, and final N1X Ollama acceptance.

Co-authored-by: Copilot App <[email protected]>
@Kixantrix

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Qualcomm ARM64 physical validation status

Conditional pass on physical device MVHLAPTOP at PR head f3c43e7b4a89afd18955efc47ff58b94553185cf. The final pass used local, uncommitted fixes that are not yet present on this PR branch, so the current head should not yet be treated as a clean-head pass.

Final physical results

  • Both assigned -PlanOnly flows completed without blockers before apply.
  • llama.cpp full run and idempotence rerun: result.ready=true, backend OpenCL, physical device Qualcomm(R) Adreno(TM) X1-85 GPU, 29/29 layers offloaded, HardwareAccelerated=true, marker DEVCONFIG_LLAMA_READY.
  • Qwen model: Qwen3-0.6B-Q4_K_M.gguf, 396,704,416 bytes, SHA-256 b0638f08417a2d3c8652760462eb5407c6e30173cf9608ad0820757a281eea0e.
  • Foundry full run and idempotence rerun: result.ready=true, selected/observed provider WebGPUExecutionProvider, selected device GPU, fallbackUsed=false, marker DEVCONFIG_FOUNDRY_READY.
  • Reboot remained pre-existing-pending; no reboot was performed or newly requested.
  • All hardware-independent AI unit suites passed under PowerShell 7 and Windows PowerShell 5.1: 1,328 assertions per host.

Findings and local fixes

  • The apparent Qwen download hang was not a download stall: LLAMA_CPP_READY had already been logged. Windows PowerShell 5.1 was hanging while serializing duplicated large benchmark evidence.
  • Newer llama.cpp b10919 was blocked by Defender ASR rule C1DB55AB-C21A-4637-BB3F-A12568109D35 (event 1121). Defender was not disabled or bypassed. Qualcomm ARM64 OpenCL was pinned to policy-approved, physically validated b10917; other backends retain rolling resolution.
  • Benchmark/warm-up now precedes inference, native execution is bounded, Windows PowerShell 5.1 argument/JSON behavior is handled, the narrowly malformed llama-bench JSON tail is repaired and disclosed, and Foundry loaded-vs-cached provider parsing is corrected.
  • The README partner harness was corrected to use hashtable splatting; the previous named-argument array splatting does not bind PowerShell named parameters correctly.

The complete local evidence bundle contains inventory, plans, final reports, rerun reports, console logs, reboot status, Defender events, prior errors, and the patch. Bundle SHA-256: 17A37CE14E9489B4AD3E02C5C4778D6011E4C7B89666CBBC7DDD4A4F65A73EFE.

Bound native executions, warm up OpenCL before inference, correct provider and JSON parsing, and pin the policy-approved Qualcomm llama.cpp build. Update partner commands and regression coverage.

Co-authored-by: Copilot App <[email protected]>

Copilot-Session: 0c9c6f4f-4ef5-4ca6-acda-43c5632d325f
@Kixantrix

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Update: The locally validated fixes have now been committed and pushed to this PR as d16e36b803a25b676237eeb709e7b9e31b12c665 (Fix Qualcomm ARM64 validation hangs). The PR head now matches the physically validated working tree, so the earlier local/uncommitted qualification is resolved.

@ranm-msft

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Looking at this from #93's side, since this targets that branch. Two things the workload entry points inherit from its launch contract:

The README documents standalone invocation (.\Workloads\cuda\install.ps1), and _common/direct-setup.ps1 dot-sources _elevation.ps1 but only calls Assert-AiAdministrator — it doesn't set or require an execution policy, and there's no signature re-check equivalent to the one bootstrap.ps1 now does after copying its payload. So these run under whatever policy the shell happens to have.

Once #93's contract lands, that policy is AllSigned in production, which matches the signer against CurrentUser\TrustedPublisher rather than trusting a Microsoft Authenticode signature outright. On a machine that hasn't already trusted the publisher, that stops at a prompt before install.ps1 loads.

Have the workload scripts been exercised under AllSigned, or so far only under the Bypass policy that #93's development instructions set up? Worth a pass before these become the public entry points.

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3 participants