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1. Commits on Nov 12, 2026

   • ct: bind an IBM Z exrl target to the instruction that it executes

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   • build: accept indexed stack loads in owned assembly frames

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   • build: name a damaged UART line in the residue log parser

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   • checksum: add AArch64 NEON and dot-product kernels for Adler-32

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   • build: test the package lane's provider content check and Git patches

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   • checksum: add Adler-32 for zlib trailers and preset dictionary identifiers

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   • build: package and test the rustls provider in the package lane

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   • build: keep the tools' rustls pins in lockstep with the provider

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   • build: build the BoGo shim from a registry rustls pin's packaged commit

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2. Commits on Nov 10, 2026

   • ct: keep a RISC-V auipc low part's identity when it prints as mv

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3. Commits on Nov 9, 2026

   • build: retry pinned tooling downloads for about a minute

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   • aead: clear the generic CTR worker stack in one 3 KiB pass

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   • build: replay ASan fuzz corpora with rscrypto at opt-level 1

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4. Commits on Nov 6, 2026

   • ct: bind what data references designate, not where they land

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5. Commits on Nov 5, 2026

   • rustls: remove the Quinn adapter

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   • build: compose measured libc allowances into whole-call stack bounds

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   • build: retry transient failures of pinned tooling downloads

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   • ci: measure painted stacks before the native suites

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   • rustls: add composite ML-DSA TLS signature schemes

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   • build: add a truncated-key worker fault and gate whole-call bounds

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   • test: cover the painted-stack recipes in the Just argument test

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   • build: measure libc edge allowances and TLS worker stacks on painted stacks

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   • test: run the QUIC interop over every group quic-go supports

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   • rustls: expose QUIC endpoint keys without Quinn

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   • build: gate every owned stack bound on a per-root CI budget

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   • workspace: license rscrypto under Apache-2.0 only

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   • build: resolve checked jump tables in stack reviews

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   • build: derive stack frames for owned assembly across labels and continuations

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6. Commits on Nov 4, 2026

   • build: model implicit x86 register operands in CT condition slices

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   • build: keep x86 NOP padding out of CT condition slices

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   • build: name PLT and POWER call stubs in CT instruction identities

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   • build: follow GOT-loaded imports through caller-saved registers in stack reviews

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   • platform: replace RSCRYPTO_FORCE_AVX512 with an explicit hybrid AVX-512 opt-in

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   • build: show function identity changes in CT waiver review records

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   • build: drop disassembler symbol names from CT immediate identities

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