ctxt *obj.Link

newprog obj.ProgAlloc

cursym *obj.LSym

printp *obj.Prog

blitrl *obj.Prog

elitrl *obj.Prog

autosize int64

instoffset int64

pc int64

pool struct {

start uint32

size uint32

extra uint32

}

as obj.As

a1 uint8

a2 int8

a3 uint8

type_ uint8

size int8

param int16

flag int8

pcrelsiz uint8

size := int(o.size)

// instruction specific

switch p.As {

default:

if out != nil {

c.asmout(p, o, out)

}

case ADATABUNDLE, // align to 16-byte boundary

ADATABUNDLEEND: // zero width instruction, just to align next instruction to 16-byte boundary

p.Pc = (p.Pc + 15) &^ 15

if out != nil {

c.asmout(p, o, out)

}

case obj.AUNDEF,

APLD:

size = 4

if out != nil {

switch p.As {

case obj.AUNDEF:

out[0] = 0xe7fedef0 // NACL_INSTR_ARM_ABORT_NOW (UDF #0xEDE0)

case APLD:

out[0] = 0xe1a01001 // (MOVW R1, R1)

}

}

case AB, ABL:

if p.To.Type != obj.TYPE_MEM {

if out != nil {

c.asmout(p, o, out)

}

} else {

if p.To.Offset != 0 || size != 4 || p.To.Reg > REG_R15 || p.To.Reg < REG_R0 {

c.ctxt.Diag("unsupported instruction: %v", p)

}

if p.Pc&15 == 12 {

p.Pc += 4

}

if out != nil {

out[0] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x03c0013f | (uint32(p.To.Reg)&15)<<12 | (uint32(p.To.Reg)&15)<<16 // BIC $0xc000000f, Rx

if p.As == AB {

out[1] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x012fff10 | (uint32(p.To.Reg)&15)<<0 // BX Rx

} else { // ABL

out[1] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x012fff30 | (uint32(p.To.Reg)&15)<<0 // BLX Rx

}

}

size = 8

}

// align the last instruction (the actual BL) to the last instruction in a bundle

if p.As == ABL {

if p.To.Sym == deferreturn {

p.Pc = ((int64(origPC) + 15) &^ 15) + 16 - int64(size)

} else {

p.Pc += (16 - ((p.Pc + int64(size)) & 15)) & 15

}

}

case ALDREX,

ALDREXD,

AMOVB,

AMOVBS,

AMOVBU,

AMOVD,

AMOVF,

AMOVH,

AMOVHS,

AMOVHU,

AMOVM,

AMOVW,

ASTREX,

ASTREXD:

if p.To.Type == obj.TYPE_REG && p.To.Reg == REG_R15 && p.From.Reg == REG_R13 { // MOVW.W x(R13), PC

if out != nil {

c.asmout(p, o, out)

}

if size == 4 {

if out != nil {

// Note: 5c and 5g reg.c know that DIV/MOD smashes R12

// so that this return instruction expansion is valid.

out[0] = out[0] &^ 0x3000 // change PC to R12

out[1] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x03ccc13f // BIC $0xc000000f, R12

out[2] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x012fff1c // BX R12

}

size += 8

if (p.Pc+int64(size))&15 == 4 {

p.Pc += 4

}

break

} else {

// if the instruction used more than 4 bytes, then it must have used a very large

// offset to update R13, so we need to additionally mask R13.

if out != nil {

out[size/4-1] &^= 0x3000 // change PC to R12

out[size/4] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x03cdd103 // BIC $0xc0000000, R13

out[size/4+1] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x03ccc13f // BIC $0xc000000f, R12

out[size/4+2] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x012fff1c // BX R12

}

// p->pc+size is only ok at 4 or 12 mod 16.

if (p.Pc+int64(size))%8 == 0 {

p.Pc += 4

}

size += 12

break

}

}

if p.To.Type == obj.TYPE_REG && p.To.Reg == REG_R15 {

c.ctxt.Diag("unsupported instruction (move to another register and use indirect jump instead): %v", p)

}

if p.To.Type == obj.TYPE_MEM && p.To.Reg == REG_R13 && (p.Scond&C_WBIT != 0) && size > 4 {

// function prolog with very large frame size: MOVW.W R14,-100004(R13)

// split it into two instructions:

// ADD $-100004, R13

// MOVW R14, 0(R13)

q := c.newprog()

p.Scond &^= C_WBIT

*q = *p

a := &p.To

var a2 *obj.Addr

if p.To.Type == obj.TYPE_MEM {

a2 = &q.To

} else {

a2 = &q.From

}

nocache(q)

nocache(p)

// insert q after p

q.Link = p.Link

p.Link = q

q.Pcond = nil

// make p into ADD $X, R13

p.As = AADD

p.From = *a

p.From.Reg = 0

p.From.Type = obj.TYPE_CONST

p.To = obj.Addr{}

p.To.Type = obj.TYPE_REG

p.To.Reg = REG_R13

// make q into p but load/store from 0(R13)

q.Spadj = 0

*a2 = obj.Addr{}

a2.Type = obj.TYPE_MEM

a2.Reg = REG_R13

a2.Sym = nil

a2.Offset = 0

size = int(c.oplook(p).size)

break

}

if (p.To.Type == obj.TYPE_MEM && p.To.Reg != REG_R9) || // MOVW Rx, X(Ry), y != 9

(p.From.Type == obj.TYPE_MEM && p.From.Reg != REG_R9) { // MOVW X(Rx), Ry, x != 9

var a *obj.Addr

if p.To.Type == obj.TYPE_MEM {

a = &p.To

} else {

a = &p.From

}

reg := int(a.Reg)

if size == 4 {

// if addr.reg == 0, then it is probably load from x(FP) with small x, no need to modify.

if reg == 0 {

if out != nil {

c.asmout(p, o, out)

}

} else {

if out != nil {

out[0] = ((uint32(p.Scond)&C_SCOND)^C_SCOND_XOR)<<28 | 0x03c00103 | (uint32(reg)&15)<<16 | (uint32(reg)&15)<<12 // BIC $0xc0000000, Rx

}

if p.Pc&15 == 12 {

p.Pc += 4

}

size += 4

if out != nil {

c.asmout(p, o, out[1:])

}

}

break

} else {

// if a load/store instruction takes more than 1 word to implement, then

// we need to separate the instruction into two:

// 1. explicitly load the address into R11.

// 2. load/store from R11.

// This won't handle .W/.P, so we should reject such code.

if p.Scond&(C_PBIT|C_WBIT) != 0 {

c.ctxt.Diag("unsupported instruction (.P/.W): %v", p)

}

q := c.newprog()

*q = *p

var a2 *obj.Addr

if p.To.Type == obj.TYPE_MEM {

a2 = &q.To

} else {

a2 = &q.From

}

nocache(q)

nocache(p)

// insert q after p

q.Link = p.Link

p.Link = q

q.Pcond = nil

// make p into MOVW $X(R), R11

p.As = AMOVW

p.From = *a

p.From.Type = obj.TYPE_ADDR

p.To = obj.Addr{}

p.To.Type = obj.TYPE_REG

p.To.Reg = REG_R11

// make q into p but load/store from 0(R11)

*a2 = obj.Addr{}

a2.Type = obj.TYPE_MEM

a2.Reg = REG_R11

a2.Sym = nil

a2.Offset = 0

size = int(c.oplook(p).size)

break

}

} else if out != nil {

c.asmout(p, o, out)

}

}

// destination register specific

if p.To.Type == obj.TYPE_REG {

switch p.To.Reg {

case REG_R9:

c.ctxt.Diag("invalid instruction, cannot write to R9: %v", p)

case REG_R13:

if out != nil {

out[size/4] = 0xe3cdd103 // BIC $0xc0000000, R13

}

if (p.Pc+int64(size))&15 == 0 {

p.Pc += 4

}

size += 4

}

}

return size

if p.Scond&C_SBIT != 0 && mayHaveSuffix[p.As]&T_SBIT == 0 {

ctxt.Diag("invalid .S suffix: %v", p)

}

if p.Scond&C_PBIT != 0 && mayHaveSuffix[p.As]&T_PBIT == 0 {

ctxt.Diag("invalid .P suffix: %v", p)

}

if p.Scond&C_WBIT != 0 && mayHaveSuffix[p.As]&T_WBIT == 0 {

ctxt.Diag("invalid .W suffix: %v", p)

}

var p *obj.Prog

var op *obj.Prog

p = cursym.Func.Text

if p == nil || p.Link == nil { // handle external functions and ELF section symbols

return

}

if oprange[AAND&obj.AMask] == nil {

ctxt.Diag("arm ops not initialized, call arm.buildop first")

}

c := ctxt5{ctxt: ctxt, newprog: newprog, cursym: cursym, autosize: p.To.Offset + 4}

pc := int32(0)

op = p

p = p.Link

var i int

var m int

var o *Optab

for ; p != nil || c.blitrl != nil; op, p = p, p.Link {

if p == nil {

if c.checkpool(op, 0) {

p = op

continue

}

// can't happen: blitrl is not nil, but checkpool didn't flushpool

ctxt.Diag("internal inconsistency")

break

}

p.Pc = int64(pc)

o = c.oplook(p)

if ctxt.Headtype != objabi.Hnacl {

m = int(o.size)

} else {

m = c.asmoutnacl(pc, p, o, nil)

pc = int32(p.Pc) // asmoutnacl might change pc for alignment

o = c.oplook(p) // asmoutnacl might change p in rare cases

}

if m%4 != 0 || p.Pc%4 != 0 {

ctxt.Diag("!pc invalid: %v size=%d", p, m)

}

// must check literal pool here in case p generates many instructions

if c.blitrl != nil {

i = m

if c.checkpool(op, i) {

p = op

continue

}

}

if m == 0 && (p.As != obj.AFUNCDATA && p.As != obj.APCDATA && p.As != ADATABUNDLEEND && p.As != obj.ANOP) {

ctxt.Diag("zero-width instruction\n%v", p)

continue

}

switch o.flag & (LFROM | LTO | LPOOL) {

case LFROM:

c.addpool(p, &p.From)

case LTO:

c.addpool(p, &p.To)

case LPOOL:

if p.Scond&C_SCOND == C_SCOND_NONE {

c.flushpool(p, 0, 0)

}

}

if p.As == AMOVW && p.To.Type == obj.TYPE_REG && p.To.Reg == REGPC && p.Scond&C_SCOND == C_SCOND_NONE {

c.flushpool(p, 0, 0)

}

checkBits(ctxt, p)

pc += int32(m)

}

c.cursym.Size = int64(pc)

/*

times := 0

var bflag int

var opc int32

var out [6 + 3]uint32

for {

bflag = 0

pc = 0

times++

c.cursym.Func.Text.Pc = 0 // force re-layout the code.

for p = c.cursym.Func.Text; p != nil; p = p.Link {

o = c.oplook(p)

if int64(pc) > p.Pc {

p.Pc = int64(pc)

}

/* very large branches

opc = int32(p.Pc)

if ctxt.Headtype != objabi.Hnacl {

m = int(o.size)

} else {

m = c.asmoutnacl(pc, p, o, nil)

}

if p.Pc != int64(opc) {

bflag = 1

}

//print("%v pc changed %d to %d in iter. %d\n", p, opc, (int32)p->pc, times);

pc = int32(p.Pc + int64(m))

if m%4 != 0 || p.Pc%4 != 0 {

ctxt.Diag("pc invalid: %v size=%d", p, m)

}

if m/4 > len(out) {

ctxt.Diag("instruction size too large: %d > %d", m/4, len(out))

}

if m == 0 && (p.As != obj.AFUNCDATA && p.As != obj.APCDATA && p.As != ADATABUNDLEEND && p.As != obj.ANOP) {

if p.As == obj.ATEXT {

c.autosize = p.To.Offset + 4

continue

}

ctxt.Diag("zero-width instruction\n%v", p)

continue

}

}

c.cursym.Size = int64(pc)

if bflag == 0 {

break

}

}

if pc%4 != 0 {

ctxt.Diag("sym->size=%d, invalid", pc)

}

/*

p = c.cursym.Func.Text

c.autosize = p.To.Offset + 4

c.cursym.Grow(c.cursym.Size)

bp := c.cursym.P

pc = int32(p.Pc) // even p->link might need extra padding

var v int

for p = p.Link; p != nil; p = p.Link {

c.pc = p.Pc

o = c.oplook(p)

opc = int32(p.Pc)

if ctxt.Headtype != objabi.Hnacl {

c.asmout(p, o, out[:])

m = int(o.size)

} else {

m = c.asmoutnacl(pc, p, o, out[:])

if int64(opc) != p.Pc {

ctxt.Diag("asmoutnacl broken: pc changed (%d->%d) in last stage: %v", opc, int32(p.Pc), p)

}

}

if m%4 != 0 || p.Pc%4 != 0 {

ctxt.Diag("final stage: pc invalid: %v size=%d", p, m)

}