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Commits on Jan 1, 2017

• update copyright year range in GDB files

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Commits on Aug 13, 2016

• sim: bfin: split out common mach/model defines into arch.h [PR sim/20438]

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Commits on Jan 10, 2016

• sim: move many common settings from CPPFLAGS to config.h

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• sim: drop unused SIM_AC_OPTION_PACKAGES

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• sim: allow the environment configure option everywhere

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• sim: allow the assert configure option everywhere

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• sim: drop targ-vals.def->nltvals.def indirection

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• sim: allow the inline configure option everywhere

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• sim: drop --enable-sim-{regparm,stdcall} options

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• sim: drop --enable-sim-cflags option

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Commits on Jan 9, 2016

• sim: drop common/cconfig.h in favor of a single config.h

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Commits on Jan 7, 2016

• sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly

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Commits on Jan 5, 2016

• sim: bfin: add support disasm tracing

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• sim: unify min/max macros

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Commits on Jan 4, 2016

• sim: punt x86-specific bswap logic

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• sim: parse_args: display getopt error ourselves

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• sim: TODO: move to wiki

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Commits on Jan 3, 2016

• sim: use libiberty countargv in more places

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• sim: drop host endian configure option

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• sim: convert to bfd_endian

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Commits on Jan 1, 2016

• GDB copyright headers update after running GDB's copyright.py script.

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Commits on Dec 27, 2015

• sim: unify sim-hload

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• sim: punt WITH_DEVICES & tconfig.h support

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• sim: bfin: push down mmr address/size checks

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Commits on Dec 26, 2015

• sim: bfin: avoid stack error under asan

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• sim: standardize sim_create_inferior handling of argv a bit more

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Commits on Dec 25, 2015

• sim: sim-model: build for everyone

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• sim: move MACH/MODEL types into SIM_xxx namespace

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• sim: device_error: punt

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• sim: make LMA loading the default for all targets

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Commits on Nov 18, 2015

• sim: always enable modulo memory

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Commits on Nov 16, 2015

• sim: sim-stop/sim-reason/sim-reg: move to common obj list

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Commits on Nov 15, 2015

• sim: sim-close: unify sim_close logic

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Commits on Oct 11, 2015

• sim: bfin: handle negative left saturated shifts as ashifts [BZ #18407]

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Commits on Jun 24, 2015

• sim: trace: add a basic cpu register class

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