Releases: SimpleCPU/SimpleCPU
Releases · SimpleCPU/SimpleCPU
SimpleCPU v0.0.2
SimpleCPUv0.0.1
- MIPS single cycle implemented
- Flow to co-simulate instruction set simulator with RTL simulation brought up
- Majority of instructions supported
Check Release.txt for further details on the instructions supported and the kind of checking performed by the instruction set simulator.